Senior DSP Fixed-Point Design Engineer

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!

Blue Origin is pioneering the future of space-based connectivity with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This network will service tens of thousands of enterprise, data center, and government users who require reliable connectivity for critical operations.

We are seeking a highly skilled Senior DSP Fixed-Point Design Engineer to join our growing Silicon Development team. In this role, you will serve as a critical bridge between theoretical signal processing algorithms and high-performance, area- and power-efficient hardware implementations for aerospace applications. You will be responsible for taking floating-point algorithmic models, rigorously analyzing their precision requirements, converting them into optimized fixed-point architectures, and collaborating closely with RTL and Design Verification (DV) teams to deliver silicon that meets the demanding reliability and performance standards of human spaceflight.

Key Responsibilities

• Fixed-Point Modeling: Convert complex floating-point DSP algorithms - sourced from Systems and Algorithm teams - into bit-true, cycle-accurate fixed-point models using MATLAB, C++, or Python, ensuring alignment with downstream hardware requirements.
• Precision & Quantization Analysis: Conduct rigorous quantization noise analysis, finite word-length effect studies, and trade-off analyses balancing area, power, and performance against SNR/EVM degradation, with a focus on meeting the stringent margin requirements of aerospace systems.
• Architecture Specification: Define and document hardware-friendly DSP architectures, including pipeline structures, optimal word lengths, rounding modes (truncation, convergent rounding), overflow/saturation logic, and scaling strategies suitable for radiation-tolerant or fault-tolerant environments.
• RTL Collaboration: Partner closely with RTL designers to guide the implementation of hardware blocks - including multipliers, CORDIC engines, FFTs, and digital filters - and review RTL code against bit-true reference models to ensure functional correctness.
• Verification Support: Generate comprehensive fixed-point test vectors and golden reference models to support pre-silicon Design Verification (DV) and post-silicon validation, enabling robust sign-off for flight-critical hardware.
• Optimization: Drive micro-architectural optimizations targeting low power consumption, high throughput, and minimal silicon area for custom hardware accelerators used in guidance, navigation, communications, and sensor processing applications.
• Cross-Functional Collaboration: Work across disciplines - including systems engineering, avionics, and software teams - to ensure DSP hardware implementations satisfy end-to-end system requirements from algorithm to flight.

Basic Qualifications

• Education: BS or MS in Electrical Engineering, Computer Engineering, or a closely related field.
• Experience: 5+ years of hands-on experience in silicon/ASIC/FPGA development with a strong focus on DSP hardware implementation.
• Fixed-Point Expertise: Deep understanding of fixed-point arithmetic, quantization noise modeling, overflow/underflow handling, dynamic range management, and scaling techniques.
• Programming Skills: Expert proficiency in MATLAB, C++, and/or Python (NumPy/SciPy) for algorithm modeling, simulation, and automated verification workflows.
• DSP Fundamentals: Strong foundation in digital signal processing, including FIR/IIR filter design, FFT architectures, multi-rate signal processing, and automatic gain control (AGC).
• Communication Skills: Ability to clearly document and communicate complex technical trade-offs to both engineering peers and program leadership.

Preferred Qualifications

• Experience with High-Level Synthesis (HLS) tools such as Catapult HLS or Vivado/Vitis HLS.
• Familiarity with RTL design (Verilog/SystemVerilog) and front-end ASIC flows (synthesis, timing closure, formal verification).
• Exposure to wireless communications standards (5G/6G, Wi-Fi) or AI/ML hardware accelerator design.

Culture Statement

Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles.

Candidates may be subject to verification and BGS screening as per applicable law.